Understanding memory access patterns using the BSC performance tools

MAPS: Understanding Metadata Access Patterns in Secure Memory

Secure memory increases both the latency and energy required for memory accesses. To reduce these overheads, computer architects have sought to cache metadata on the processor chip, but placing metadata in a simple cache has not been as effective as expected. With a detailed analysis of metadata access patterns, we clarify myths in metadata caching and provide insight into more efficient cachin...

A Study of Memory Access Patterns in Irregular Parallel Codes Using Hardware Counter-Based Tools

This work presents the development of a series of tools to simplify both EARs (Event Address Registers) counters reading and programming in parallel codes. These tools allow EAR counters access in a user friendly workspace. The next tools have been developed: A tool for inserting, in a simple and intuitive manner, the code needed to monitor and program hardware counters in a parallel program. A...

Learning Memory Access Patterns

The explosion in workload complexity and the recent slow-down in Moore’s law scaling call for new approaches towards efficient computing. Researchers are now beginning to use recent advances in machine learning in software optimizations, augmenting or replacing traditional heuristics and data structures. However, the space of machine learning for computer hardware architecture is only lightly e...

Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolvingmanycore architectures. High performance computing (HPC) applications and librariesmust exploit increasingly finer levels of parallelismwithin their codes to sustain scalability on these devices. A major obstacle to performance portability is the diverse a...

Tools to aid in the analysis of memory access patterns for FORTRAN programs